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[Title]; 14-11-17, 13:32 Download Xf-Adsk2013 X64 : [Title]; 20-02-17, 08:23 Download Xf-adsk2015 x64.exe : [Title]; 14-11-17, 13:17 Download Xf-adsk2015 x64.exe : [Title]; 21-02-17, 08:34 Download Xf-adsk2015 x64.exe : [Title]; 14-11-17, 14:07 Download Xf-adsk2015 x64.exe : [Title]; 14-11-17, 14:13 Download Xf-adsk2015 x64.exe : [Title]; 14-11-17, 14:14 Download Xf-adsk2015 x64.exe : 1. Field of the Invention This invention relates to a method for fabricating a semiconductor device and a semiconductor device fabricated by the method and, more particularly, to an electrically erasable programmable read only memory (E.sup.2 PROM). 2. Description of the Prior Art As shown in FIG. 1, a conventional E.sup.2 PROM is manufactured by forming an N-diffusion layer 11 which functions as a drain region, a P-diffusion layer 12 which functions as a source region and an N.sup.+ -diffusion layer 13 which functions as a floating gate in a P-type silicon substrate 10 by an ordinary CMOS process. The fabrication steps are explained below. (1) A P-type well region 2 is formed in a prescribed region of the P-type silicon substrate 10. (2) An N-well region 3 is formed in the N-type silicon substrate 10 by an ion implanting process and a thermal process. (3) N.sup.+ – and P-diffusion layers 11, 12, 13 are formed in the prescribed region. (4) A device isolation region (field oxide film) 4 is selectively formed by an ordinary selective oxidation process. In such a conventional E.sup.2 PROM, there is the problem that high-resistance poly-crystalline silicon is used for the source and drain regions, which can result in an increase in the memory area. The conventional E.sup.2 PROM is manufactured according to the CMOS f30f4ceada


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